Physical Design Engineer Job at Sintegra Inc., Santa Clara, CA

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  • Sintegra Inc.
  • Santa Clara, CA

Job Description

Job Description:

We are on the lookout for a highly specialized Physical Design Verification (PDV) Expert with rich experience in Cadence Pegasus. If you have a strong background in design, verification, and debugging, along with expertise in Pegasus, we’d love to connect with you!

Key Responsibilities:

  • Conduct block-level design from Netlist-to-GDSII, including synthesis, floor-planning, place & route, timing/EMIR, and signoff.
  • Execute structural implementation tasks such as datapaths, bus planning, and routing.
  • Provide expert guidance on Cadence Pegasus usage for tasks like debugging LVS and ERC issues.
  • Lead efforts to integrate and optimize PDV workflows using Pegasus.
  • Collaborate with and mentor team members to build Pegasus expertise within the organization.

Required Skills and Qualifications:

  • Proficiency with Synopsys Implementation tools.
  • Solid scripting skills in Tcl and Python.
  • Extensive experience with multi-power domain design.
  • Expert-level knowledge of Cadence Pegasus, with hands-on experience in debugging and verification tasks (LVS and ERC).
  • Ability to teach and support others in using Pegasus effectively.

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